Embedded Multimedia Security Systems
by Pande, Amit; Zambreno, JosephFormat: Hardcover
Pub. Date: 2012-09-14
Publisher(s): Springer-Verlag New York Inc
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Summary
Opening with a detailed review of existing techniques for selective encryption, this text then examines algorithms that combine both encryption and compression. The book also presents a selection of specific examples of the design and implementation of secure embedded multimedia systems. Features: reviews the historical developments and latest techniques in multimedia compression and encryption; discusses an approach to reduce the computational cost of multimedia encryption, while preserving the properties of compressed video; introduces a polymorphic wavelet architecture that can make dynamic resource allocation decisions according to the application requirements; proposes a light-weight multimedia encryption strategy based on a modified discrete wavelet transform; describes a reconfigurable hardware implementation of a chaotic filter bank scheme with enhanced security features; presents an encryption scheme for image and video data based on chaotic arithmetic coding.
Author Biography
Dr. Amit Pande is an NSF Computing Innovation Fellow at the Department of Computer Science of the University of California, Davis, USA. Dr. Joseph Zambreno is an Associate Professor and Co-Director of the Reconfigurable Computing Lab at Iowa State University, Ames, USA.
Table of Contents
| Multimedia Systems | |
| Introduction | p. 3 |
| Video Coding | p. 3 |
| Embedded Systems and Reconfigurable Architectures | p. 6 |
| Encryption Basics | p. 8 |
| Advances in Multimedia Encryption | p. 11 |
| Introduction | p. 11 |
| Multimedia Encryption Problem | p. 12 |
| Common Approaches to Video Encryption | p. 13 |
| Scrambling | p. 13 |
| Post-compression Encryption Algorithm | p. 17 |
| Pre-compression Encryption Algorithm | p. 19 |
| Selective Encryption | p. 19 |
| Joint Video Compression and Encryption (JVCE) Approaches | p. 21 |
| Future of JVCE Schemes | p. 21 |
| References | p. 22 |
| Securing Multimedia Content Using Joint Compression and Encryption | p. 23 |
| Introduction | p. 23 |
| Basics | p. 24 |
| Our Approach | p. 26 |
| References | p. 28 |
| Examples | |
| Polymorphic Wavelet Transform | p. 33 |
| Introduction | p. 33 |
| Motivation and Insight | p. 37 |
| Daubechies 9/7-Tap Bi-orthogonal Filter | p. 38 |
| Le Gall's 5/3 Filter | p. 39 |
| Background and Related Work | p. 40 |
| Wavelet Transform Background | p. 41 |
| Hardware Implementation of DWT | p. 42 |
| Poly-DWT Filter | p. 43 |
| Parameterized Filter Design | p. 43 |
| Numerical Study | p. 44 |
| Candidate Filters | p. 45 |
| Hardware Architectures | p. 47 |
| Fixed Point Implementation | p. 51 |
| Hardware (Re)-allocation | p. 52 |
| 'On-the-Fly' Switching | p. 52 |
| 'Bit-Width' Switching | p. 54 |
| Experiments | p. 55 |
| Image Reconstruction Quality | p. 55 |
| Hardware vs. Software Performance | p. 56 |
| Hardware Comparison | p. 57 |
| Dynamic Bit Allocation | p. 60 |
| Real-World Application | p. 60 |
| Conclusions and Future Work | p. 62 |
| References | p. 62 |
| The Secure Wavelet Transform | p. 67 |
| Introduction | p. 67 |
| Preliminaries | p. 69 |
| Parameterized Construction of DWT | p. 70 |
| Subband Re-orientation | p. 74 |
| Security | p. 76 |
| Hardware Implementation | p. 79 |
| Reconfigurable Constant Multiplier (RCM) | p. 80 |
| Implementation Results | p. 84 |
| Parameterized Lifting | p. 84 |
| Conclusion and Future Work | p. 87 |
| References | p. 87 |
| Chaotic Filter Banks | p. 91 |
| Introduction | p. 91 |
| Chaos and Cryptography | p. 91 |
| Wavelets and Chaotic Filter Banks | p. 92 |
| Scope and Organization | p. 93 |
| Reconfigurable Hardware Implementation of DWT | p. 93 |
| Chaotic Filter Bank Scheme | p. 94 |
| Chaotic Maps | p. 95 |
| Key Space | p. 95 |
| The MCFB Scheme | p. 96 |
| Improved Chaotic Oscillator | p. 98 |
| The Modified Logistic Map (MLM) | p. 98 |
| Wavelet Parameterization | p. 100 |
| Resistance of Chaotic Generator Against Cryptanalysis | p. 100 |
| Randomness Tests | p. 101 |
| Bifurcation Map | p. 103 |
| Lyapunov Exponent | p. 103 |
| Security Enhancement | p. 105 |
| Hardware Implementation | p. 106 |
| Hardware Optimizations for ICO | p. 108 |
| Conclusions | p. 109 |
| References | p. 109 |
| Chaotic Arithmetic Coding | p. 113 |
| Introduction | p. 113 |
| Weakness of SAC Coder | p. 114 |
| Arithmetic Coding with Piece-wise Linear Chaotic Maps | p. 115 |
| Compression Efficiency | p. 117 |
| Binary Chaotic Arithmetic Coding (BCAC) | p. 118 |
| Implementation Efficiency | p. 121 |
| Security | p. 121 |
| Application to Multimedia/Data Encryption | p. 121 |
| Threat Model | p. 122 |
| Security Enhancements (SE) | p. 122 |
| Resistance to Known Attacks | p. 125 |
| Comparison with BAC+AES | p. 127 |
| Key and Plaintext Sensitivity | p. 127 |
| Selective Encryption Using BCAC | p. 129 |
| Compression | p. 129 |
| Hardware Implementation | p. 130 |
| Literature Review | p. 131 |
| Implementation Details | p. 132 |
| Binary Arithmetic Coder (BAC) Architecture | p. 133 |
| Binary Chaotic Arithmetic Coder and Encryption (BCAC) Architecture | p. 133 |
| Cost of Encryption | p. 134 |
| N-ary Chaotic Arithmetic Coder and Encryption (NCAC) Coding | p. 134 |
| Multiple Symbol per Cycle Arithmetic Coding | p. 136 |
| Related Work | p. 137 |
| Multiple Huffman Tables | p. 137 |
| Randomized Arithmetic Coding | p. 138 |
| Secure Arithmetic Coding | p. 139 |
| Conclusion | p. 140 |
| References | p. 140 |
| Conclusion | p. 143 |
| Index | p. 145 |
| Table of Contents provided by Ingram. All Rights Reserved. |
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